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Podcast

EE Journal: Managing the Massive Data Throughput: AI-Based Designs and The Value of NoC Tiling

In this podcast with Amelia Dalton and Andy Nightingale, explore the key challenge faced by SoC designers when building NoC interconnects for AI-based designs, the details of NoC interconnect IP soft tiling, and some real-world examples of AI-based designs that benefit from NoC IP soft tiling.
Podcast

EE Journal: The Network-on-Chip Pioneer: How Arteris Enabling SoC Developers to Create Physically Valid NoCs Faster

Physically aware network-on-chips take center stage in this week’s Fish Fry podcast! Andy Nightingale from Arteris and I investigate the role that network-on-chips have played in the development of SoC designs.
Podcast

Electronic Design: All About NoCs

Today’s SoCs are very complex. They have multiple cores and often these cores vary in type, e.g., CPUs, GPUs, and NPUs. Connecting these to peripherals and memory typically involves one or more network-on-chips (NoCs). In this podcast, Electronic Design Editor Bill Wong talks with Andy Nightingale, VP Product Management and Marketing at Arteris, about NoCs.
Podcast

SemiWiki: The Impact of Arteris on Automotive and Beyond with Frank Schirrmeister

Dan Nenni of SemiWiki is joined by Arteris’ Frank Schirrmeister in a conversation on automotive and the impact of network-on-chip IP on system design.
Podcast

SemiWiki: A Broad View of Design Architectures and the Role of the NoC with Arteris’ Michal Siwinski

SemiWiki’s Dan Nenni welcomes Michal Siwinski, CMO of Arteris, for an in-depth discussion of modern design architectures and the crucial role of Network-on-Chips (NoCs).
Podcast

EE Journal: The Freedom to Innovate: Arteris and the Rise of RISC-V

The adoption of RISC-V is spreading. Versatility and “freedom to innovate” are powering the ecosystem. Frank Schirrmeister, VP Solutions and Business Development at Arteris, spoke to EE Journal’s Amelia Dalton on the fish fry podcast.
Podcast

SemiWiki: The Impact of Using a Physically Aware NoC with Charlie Janac

Arteris CEO joins SemiWiki’s Daniel Nenni on Semiconductor Insiders Podcast to discuss the impact of using a physically aware NoC.
FlexNoC 5 Interconnect IP Datasheet
Datasheet

FlexNoC® 5 Interconnect IP

  • Non-coherent network-on-chip (NoC) interconnect IP
  • Protocol interoperability: AMBA 5, ACE-Lite, AXI, AHB, APB; OCP; PIF
  • Reduce wire…
FlexGen® 1, FlexNoC® 5 & FlexWay® 5 Functional Safety Option
Datasheet

FlexGen® 1, FlexNoC® 5 & FlexWay® 5 Functional Safety Option

  • ISO 26262 ASIL D certifiable. Helps enable the highest level of functional safety.
  • Comprehensive safety features….
FlexNoC® Reliability Option for Enterprise Applications and Industrial Applications
Datasheet

FlexNoC® Reliability Option for Enterprise Applications and Industrial Applications

  • Enables robust reliability in enterprise SoC designs
  • Helps with seamless coordination of data and control signals…
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