Electronic Design: Adding Cache to IPs and SoCs
Integrating cache memory into SoCs and IP blocks improves their performance and efficiency. This article highlights technologies and strategies to address challenges like cache coherency and power consumption.
Semiconductor Engineering: Streamlining SoC Design With Advanced IP And Integration Solutions
An emphasis on physical awareness significantly reduces the iterative cycles of NoC placement and routing.
Semiconductor Engineering: Promises and Pitfalls of SoC Restructuring
Learn about sidestepping data incompatibility issues in heterogeneous chip designs.
Design & Reuse: Creating SoC Designs Better and Faster With Integration Automation
SoC design complexity is exploding. CSRCompiler automates hardware/software interface (HSI) tasks, reduces errors, and cuts the HSI development process by up to one-third, minimizing frustration, increasing productivity, reducing risk, and speeding time to market.
SemiWiki: Arteris at the 2024 Design Automation Conference
Arteris brings cutting-edge technology to DAC 2024, empowering engineers to create high-performance SoCs with greater efficiency.
SemiWiki: Arteris is Solving SoC Integration Challenges
SemiWiki’s Mike Gianfagna chatted with Arteris’ Insaf Meliane about the challenges of SoC integration and how Arteris is helping companies reduce design time while improving the quality of the design.
All About Circuits: Speeding Derivative SoC Designs With Networks-on-Chips
Creating a new implementation of an SoC from the ground up is resource-intensive, time-consuming, and expensive. Learn how NoC IP from Arteris was used to bring a derivative design to market faster.
Semiconductor Engineering: Turbocharging Cost-Conscious SoCs With Cache
Many SoC developers enjoy the challenge of squeezing the highest performance possible out of their designs. Is deploying last-level cache the answer?
Electronic Design: Functional Safety for Control and Status Registers
Managing FuSa-enhanced CSRs is a challenge. New solutions enable quick, scalable automation reducing the time to generate the HSI for SoCs.
Design News: SoC NoCs: Homegrown or Commercial Off-the-Shelf?
Modern SoCs require proven network-on-chip (NoC) IP. Commercial NoCs, coherent or non-coherent, offer tremendous advantages to design teams and the end product.