SemiWiki: Arteris is Solving SoC Integration Challenges
, 2024年06月06日
The difficulty of SoC integration is clearly getting more demanding. Driven by process node density, multi-chip integration and seemingly never-ending demands for more performance at lower power, the hurdles continue to increase. When you consider these challenges in the context of Arteris, it’s natural to think about hardware integration and the benefits a network-on-chip (NoC) technology offers. But the problem is much bigger than hardware integration and so is the portfolio of solutions offered by Arteris. Managing all the information associated with a complex design and ensuring all teams are working off the same verified information is a daunting task. What you don’t know can hurt you. I recently had the opportunity to learn about the broader solution Arteris offers. Read on to see how Arteris is solving SoC integration challenges.
An Overview of the Problem
While most folks immediately think “NoC” when they hear Arteris, the company is assembling a much broader portfolio of solutions. The common thread is that they all facilitate more efficient and predictable connectivity and assembly of the design. At the highest level, the way I think about the company’s role is this – focus on your unique design idea and let Arteris help you put it all together.
I was able to spend some time recently with Insaf Meliane, Product Management & Marketing Manager at Arteris. Insaf has been with Arteris for three years. She came to Arteris through the company’s acquisition of Magillem, where she worked for four years prior to joining Arteris. She has a rich background in chip design from places such as NXP Semiconductors, ST Microelectronics and ST-Ericsson. Insaf was able to enlighten me about how Magillem’s technology helps Arteris deliver a holistic solution to the SoC integration problem. She began by describing the problem.
The information Insaf shared was, in part, based on actual customer discussions. She described SoC integration as a massive amount of hardware and software information each design creates and how that data interacts with the design flow and all the teams using it.