Arteris Ncore Cache Coherent Interconnect IP enabled by ARM’s Cycle Models

Arteris, 2016年05月25日

Cycle-accurate SystemC models power highly scalable verification and performance optimization infrastructure

CAMPBELL, California — May 24, 2016 — Arteris Inc., the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has used ARM® Cycle Models for use in hardware and performance verification Ncore™ Cache Coherent Interconnect IP.

ARM Cycle Models provide early, secure access to ARM’s leading edge IP. Enabling Arteris to integrate this technology into their development infrastructure highlights ARM’s commitment to enabling design optimization, time-to-market and cost-efficiency gains for our ecosystem partners.

Javier Orensanz, General Manager, Development Solutions Group, ARM

Arteris has been a long-time partner with the Cycle Model team at ARM, with many mutual customers, and licensed ARM processor Cycle Models, Performance Analysis Kits and SoC Designer Plus for its own development use in 2014. The ARM Cycle Models provide fast, 100 percent cycle accurate simulation of the latest ARM processor IP, enabling the Arteris team to create a highly scalable infrastructure to verify compliance with the ARM AMBA® ACE protocol and to optimize the Ncore interconnect IP for a broad range of system-level use cases. The SoC Designer Plus Swap & Play technology was instrumental in the creation of fast virtual platforms running software test suites to characterize system bandwidth and latency for a multitude of use cases.

“ARM Cycle Models provide early, secure access to ARM’s leading edge IP,” said Javier Orensanz, general manager, development solutions group, ARM. “Enabling Arteris to integrate this technology into their development infrastructure highlights ARM’s commitment to enabling design optimization, time-to-market and cost-efficiency gains for our ecosystem partners.”

“ARM’s system-level modeling and virtual prototyping technologies have been critical to development of our new Ncore cache coherent technology,” said K. Charles Janac, President and CEO of Arteris. “Being able to quickly integrate the latest ARM IP into our testing infrastructure and simulate it on a large scale has helped us increase the quality of our product and produce a world-class performance optimization and verification environment.”

About Arteris

Arteris, Inc. provides system-on-chip (SoC) interconnect IP and tools to accelerate SoC semiconductor assembly for a wide range of applications. Rapid semiconductor designer adoption by customers such as Samsung, Huawei / Hisilicon, Mobileye, Altera, and Texas Instruments has resulted in Arteris being the only semiconductor IP company to be ranked in the Inc. 500 and Deloitte Technology Fast 500 lists in 2012 and 2013. Customer results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. More information can be found at stage.arteris.com.

Arteris, FlexNoC and the Arteris logo are trademarks of Arteris. All other product or service names are the property of their respective owners.

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Gina Jacobs

Arteris

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